an unfinished chip with electronic components that have not been connected. The chip is completed by designing and adhering the top metal layers which provide the interconnecting pathways. This final masking stage is less costly than designing the chip from scratch. The gate array is made up of basic cells, each cell containing some number of transistors and resistors depending on the vendor. Using a cell library (gates, registers, etc.) and a macro library (more complex functions), the customer designs the chip, and the vendor's software generates the masks that connect the transistors.